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On Sunday, May 28, 2023 at 1:12:43â¯AM UTC-4, bitrex wrote:
On 5/28/2023 12:10 AM, John Larkin wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <us...@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <b...@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
I think feature-rich mixed-signal FPGAs that are around the quad XOR
gate price point are pretty exciting!
FPGAs at TTL logic prices? Has TTL gone up sharply in the last year or so? Which FPGAs would this be?
Or was this sarcasm? Text medium often requires some explicit indication of sarcasm.
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
On 5/28/2023 12:10 AM, John Larkin wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
I think feature-rich mixed-signal FPGAs that are around the quad XOR
gate price point are pretty exciting!
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
On 5/28/2023 6:41 AM, Ricky wrote:
On Sunday, May 28, 2023 at 1:12:43â¯AM UTC-4, bitrex wrote:
On 5/28/2023 12:10 AM, John Larkin wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <us...@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <b...@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
I think feature-rich mixed-signal FPGAs that are around the quad XOR
gate price point are pretty exciting!
FPGAs at TTL logic prices? Has TTL gone up sharply in the last year or so? Which FPGAs would this be?
Or was this sarcasm? Text medium often requires some explicit indication of sarcasm.
Some call a chip like the SLG46537 a \"micro-FPGA\", or a mixed-signal
CPLD with FPGA-like features, or whatever u wanna call it.
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isnt.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isnÂt.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isnÂt.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
Joe Gwinn
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
The theorems are correct, so the phase of the fundamental can be located to
any accuracy you like, regardless of the waveform symmetry or lack of it.
Identifying phase with the position of the zero crossings becomes an
ill-defined operation very quickly as the SNR declines.
Even a DC offset will screw that up.
On Mon, 29 May 2023 16:01:30 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
The theorems are correct, so the phase of the fundamental can be located to
any accuracy you like, regardless of the waveform symmetry or lack of it.
Which theorems?
Identifying phase with the position of the zero crossings becomes an
ill-defined operation very quickly as the SNR declines.
Even a DC offset will screw that up.
Yes.
What we need to know is what matters most in the OPs problem.
Joe Gwinn
On Sunday, May 28, 2023 at 11:23:22?PM UTC+10, Phil Hobbs wrote:
On 2023-05-28 00:52, boB wrote:> On Sat, 27 May 2023 21:10:34 -0700,
John Larkin <jla...@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <us...@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <b...@K7IQ.com> wrote:
snip
I think that the way to do this may actually be to use a cheap ARM Cortex M0+ or similar micro with at least 2 A/D inputs and at least some speed. 60 Hz area should work easily done with a 48 MHz part I think. The whole PLL should be able to be done in one of these actually. Digital filtering and all.
If the waveform can be really gnarly, then what you want is a digital lock-in, where you multiply samples of the input by samples of a good-quality sine wave, and relying on the orthogonality of sines and cosines in both the continuous-time and sampled domains.
An analog multiplier and and analog sine wave can work just as well.
There are various way of doing that, mostly depending on whether the sampling clock is derived from a fixed-frequency oscillator or from one locked to the input. There are advantages to both.
Getting tunable clean sinewave oscillator for a phase-locked loop can be tricky. I\'ve worked out a couple of ways of doing it, but haven\'t put any of them into practice.
A well filtered Direct Digital Synthesis chip can come pretty close
Using a fixed-frequency sampling clock is simpler, and all the nice Fourier transform and DSP theorems hold exactly.
Using a phase-locked sampling clock helps keep all the sampling and slewing transients fixed, so that non-ideal behavior of the sampling system doesn\'t lead to phase modulation. (Frequency-domain applications are absolutely brutal at showing up any non-ideal behavior of your sampling system, which is why everybody seems to screw up their first digital lock-in design.)
There\'s also a lot of high frequency digital hash floating around the powers, and it takes careful design and layout to keep it out of the places where it creates problems.
Using ECL logic puts much less hash on the power rails, but that tends to be impractical.
We\'re obviously relying on the validity of the orthogonality relations in both cases, so in the variable-clock case, the tuning range has to be kept within reasonable bounds. (The math isn\'t difficult, but you do have to take some care.)
Getting the layout and right and keeping the high frequency hash away from the sensitive bits takes no less care.
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 16:01:30 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
The theorems are correct, so the phase of the fundamental can be located to
any accuracy you like, regardless of the waveform symmetry or lack of it.
Which theorems?
Fourier decomposition. You derive each Fourier coefficient as the
normalized overlap integral of the corresponding eigenfunction and the
given function. The computation becomes exact as the limits of integration
go to infinity.
Cheers
Phil Hobbs
Identifying phase with the position of the zero crossings becomes an
ill-defined operation very quickly as the SNR declines.
Even a DC offset will screw that up.
Yes.
What we need to know is what matters most in the OPs problem.
Joe Gwinn
On Sun, 28 May 2023 01:12:36 -0400, bitrex <user@example.net> wrote:
On 5/28/2023 12:10 AM, John Larkin wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
I think feature-rich mixed-signal FPGAs that are around the quad XOR
gate price point are pretty exciting!
Both are almost free, but the FPGA needs to be programmed.
On Saturday, May 27, 2023 at 5:48:44?PM UTC-4, boB wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
The analog multiplier function in figure 24 here
https://www.ti.com/lit/ds/symlink/lm13700.pdf
only requires half a LM13700, and some resistors.
On Mon, 29 May 2023 17:17:40 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 16:01:30 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
The theorems are correct, so the phase of the fundamental can be located to
any accuracy you like, regardless of the waveform symmetry or lack of it.
Which theorems?
Fourier decomposition. You derive each Fourier coefficient as the
normalized overlap integral of the corresponding eigenfunction and the
given function. The computation becomes exact as the limits of integration
go to infinity.
This application is for an inverter synchronizing to grid.
We are doing this now in software both ways. Zero crossing detect and
multiplier/filtering PLL. The zero-cross method works but can be a but
jumpy once in a while. The more complicated method works better I
think but takes a lot of processor time. It CAN also become somewhat
unstable if not given the right coefficient values etc.
Since it can be computationally intensive so I was trying to see if
there might be an out of the main microcontroller\'s code space method
of accomplishing this part, inexpensiviely. Another micro, although a
cheap micro can do this instead of an old style PLL IC.
On Mon, 29 May 2023 17:17:40 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 16:01:30 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
The theorems are correct, so the phase of the fundamental can be located to
any accuracy you like, regardless of the waveform symmetry or lack of it.
Which theorems?
Fourier decomposition. You derive each Fourier coefficient as the
normalized overlap integral of the corresponding eigenfunction and the
given function. The computation becomes exact as the limits of integration
go to infinity.
Cheers
Phil Hobbs
Identifying phase with the position of the zero crossings becomes an
ill-defined operation very quickly as the SNR declines.
Even a DC offset will screw that up.
Yes.
What we need to know is what matters most in the OPs problem.
Joe Gwinn
This application is for an inverter synchronizing to grid.
We are doing this now in software both ways. Zero crossing detect and
multiplier/filtering PLL. The zero-cross method works but can be a bit
jumpy once in a while.
The more complicated method works better I
think but takes a lot of processor time. It CAN also become somewhat
unstable if not given the right coefficient values etc.
Since it can be computationally intensive so I was trying to see if
there might be an out of the main microcontroller\'s code space method
of accomplishing this part, inexpensiviely. Another micro, although a
cheap micro can do this instead of an old style PLL IC.
DC offset should not be a problem. If there is DC on the grid or
generator, then the whole unit should disconnect from that AC source.
On 2023-05-30 00:32, boB wrote:
On Mon, 29 May 2023 17:17:40 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 16:01:30 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Mon, 29 May 2023 01:34:50 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sun, 28 May 2023 18:04:55 -0000 (UTC), Phil Hobbs
pcdhSpamMeSenseless@electrooptical.net> wrote:
Joe Gwinn <joegwinn@comcast.net> wrote:
On Sat, 27 May 2023 21:52:07 -0700, boB <boB@K7IQ.com> wrote:
On Sat, 27 May 2023 21:10:34 -0700, John Larkin
jlarkin@highlandSNIPMEtechnology.com> wrote:
On Sat, 27 May 2023 21:01:32 -0400, bitrex <user@example.net> wrote:
On 5/27/2023 7:36 PM, John Larkin wrote:
On Sat, 27 May 2023 14:48:28 -0700, boB <boB@K7IQ.com> wrote:
Is anybody making a PLL IC with multiplier input phase detector that
doesn\'t cost, like $50+ from Analog Devices ? Parts that are active
and still being manufactured ?
I used to use ones like the XR-215 and some others but have not seen
any for many years now.
The 74HC4046 is OK but not the phase detector I am looking for.
Not for microwave use. Much lower frequency than those kinds.
boB
You could make one. Use a dual comparator and an xor gate for the
multiplier.
Or a quad XOR gate to be really cheap.
Using the SLG46537 mixed-signal PLC or similar you can build a pair of
nice edge detectors with its four onboard comparators maybe sort of like
this:
https://patents.google.com/patent/EP0643484A1/en
And then with the 8 stage async state machine you can implement several
phase detector topologies, once you\'ve got edges for firing the
transitions.
I think 25 cents or so in small quantity:
https://www.renesas.com/us/en/products/programmable-mixed-signal-asic-ip-products/greenpak-programmable-mixed-signal-products/greenpak-asynchronous-state-machine/slg46537-greenpak-programmable-mixed-signal-matrix-asynchronous-state-machine
Yes, you can make a nice phase-frequency detector in an FPGA.
Thanks for the suggestions.
We do already use the Silego Greenpak devices. Great parts !
This question was intended to find one like the old PLL chips that,
Like Phil Hobbs said, are all gone now. As fo the MC1496, we used to
actually use those many decades ago in an FM tuner we used to make.
The reason for the analog multiplier instead of digital comparator or
zero crossing detector is that this was going to be used for synching
to 60Hz (ish) AC grid or generator sine-waves that may very well be
distorted. Especially genny waveforms. Those do not ensure that zero
crossing is clean and detectble repeatably.
I had even looked to try and find an analog multiplier IC and those
are not availabe for cheap. Could make one out of log amps using
CD3046 transistor arrays but that is quite a few parts.
I think that the way to do this may actually be to use a cheap ARM
Cortex M0+ or similar micro with at least 2 A/D inputs and at least
some speed. 60 Hz area should work easily done with a 48 MHz
part I think. The whole PLL should be able to be done in one of these
actually. Digital filtering and all.
You are basically trying to estimate the phase and frequency of the
fundamental of a distorted signal, where the fundamental is known to
be very close to 60 Hz. This is easily done by fitting a sinewave
function to the A/D samples in a batch maybe a second or two long, so
long as the distortion isn\'t too bad. If it is bad, some added
complication is needed, such as modeling a few of the harmonics as
well.
Joe Gwinn
The multiply-and-average approach is guaranteed to work, though, and
fitting isn?t.
Because fitting emphasizes the worst outliers, it falls apart completely at
low SNR, whereas multiply+average works even with SNRs way below 0 dB.
True in general, but with a power source, wideband random noise isn\'t
usually the problem, it\'s waveform distortion due to the generator
design, plus power-system transients.
Which is why in practice one does some data grooming first, like
impulse clamping or blanking, if the impulses are common enough to
matter.
I would assume that a distorted waveform may also affect the imputed
zero crossing locations from multiply-and-average, at least the odd
harmonics will, but I don\'t know how important that is for the OP\'s
intended use. Probably will want to clamp the transients as well.
Joe Gwinn
Nope. Multiply and average pulls out the in-phase fundamental component to
any accuracy you like (and that your digitizer can manage), while ignoring
all the harmonics to the same accuracy.
There are the usual Shannonish tradeoffs between accurate tracking of FM
and noise elimination, but you can notch out the harmonics by simply
averaging for an integer number of cycles.
Having the correct phase vs time, the same numerical oscillator code will
make a clean replica shifted by 90 degrees so as to match the fundamental
component of the input.
I should say that if one is trying to lock to an edge, rather than to the
fundamental component, life does get harder and less well defined as the
SNR drops or the waveform gets gnarlier-looking, as you say.
Yes. And doesn\'t the multiply-and-average approach implicitly depend
on the full-bandwidth waveform being symmetric in time? Said another
way, would the zero-crossings of a asymmetric triangle wave be
precisely located in time?
The theorems are correct, so the phase of the fundamental can be located to
any accuracy you like, regardless of the waveform symmetry or lack of it.
Which theorems?
Fourier decomposition. You derive each Fourier coefficient as the
normalized overlap integral of the corresponding eigenfunction and the
given function. The computation becomes exact as the limits of integration
go to infinity.
This application is for an inverter synchronizing to grid.
We are doing this now in software both ways. Zero crossing detect and
multiplier/filtering PLL. The zero-cross method works but can be a but
jumpy once in a while. The more complicated method works better I
think but takes a lot of processor time. It CAN also become somewhat
unstable if not given the right coefficient values etc.
If you tweak it wrong, it\'ll lose lock, for sure. The loop can also
oscillate while remaining in lock (more or less).
A reliable way of doing the lock detection is to do the multiplication
with both the sine and cosine components of the reference. The loop
will lock at quadrature, where the other multiplication reaches a peak.
Multiply-and-average is much better than a phase-frequency detector.
PFDs are sensitive to the number of edges, so any time you get a
spurious edge, the loop loses lock and has to reacquire. Multiplying
phase detectors and even XOR gates are much better if the signals aren\'t
squeaky-clean. An XOR doesn\'t care about transitions, just the duty
cycle of the result.
To save processor time, you could use a simple IIR filter to knock down
the harmonics a bit, and then multiply by +-1, giving the rough
equivalent of an OR phase detector with lock detection. If you pick the
coefficients cleverly, you can do it all with a few shifts and adds.
(You want to avoid thresholding the filtered signal before
XORing--otherwise junk happening near the zero crossing will get
amplified a lot.)
Since it can be computationally intensive so I was trying to see if
there might be an out of the main microcontroller\'s code space method
of accomplishing this part, inexpensiviely. Another micro, although a
cheap micro can do this instead of an old style PLL IC.
(The RF PLL chips weren\'t that great either.)
Cheers
Phil Hobbs